【公开课】半导体器件原理II — 香港科技大学 -(英文授课,中英字幕,Principle of Semiconductor Devices Part II)

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2020-02-28 22:44:57
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https://courses.edx.org/courses/course-v1:HKUSTx+ELEC3500.2x+1T2020/course/ Principle of Semiconductor Devices Part II: Field Effect Transistors and MOSFETs 半导体器件原理II:场效应晶体管和MOSFET,英文授课,中英字幕 【公开课】半导体器件原理I:www.bilibili.com/video/av92431841/
www.bilibili.com/read/cv9038294 关于“微电子与纳电子学”的使用说明及版权声明
视频选集
(1/71)
1.1 Structure of a MOSFET
04:35
1.2 Structure of a MOS capacitor
06:58
1.3 Accumulation mode
05:59
1.4 Depletion model
05:58
1.5 Inversion mode
04:33
1.6 MOS capacitor charge distribution summary
03:19
2.1 Accumulation and depletion charge
03:46
2.2 Calculating surface band bending
05:21
2.3 Threshold voltage and inversion charge
05:58
2.4 Equilibrium capacitance of a MOS capacitor
03:42
2.5 Dynamic capacitance in the inversion region
06:57
3.1 CCD operation principle
04:55
3.2 CCD image sensor architecture
06:16
3.3 CCD design and structural optimization
02:09
3.4 CCD image sensor performance
03:50
3.5 CMOS active pixel sensors
03:52
4.1 Introduction to CMOS technology
05:42
4.2 MOS capacitor with a source
05:27
4.3 Effects of body voltage
04:44
4.4 Threshold voltage with a substrate bias
04:14
4.5 MOS capacitors with a body bias
03:32
5.1 Charge and velocity of channel carriers
06:18
5.2 Linear region current equation
04:31
5.3 Saturation region current equation
05:53
5.4 Channel length modulation
05:18
5.5 Inconsistencies in the pinch-off model
03:37
6.1 MOSFET subthreshold region
04:09
6.2 Turn-on characteristics
04:25
6.3 Subthreshold swing
02:43
6.4 Current at the threshold voltage
02:19
6.5 MOSFET versus BJT
05:03
6.6 I-V characteristics with substrate bias
03:45
6.7 The substrate depletion charge effect
05:25
7.1 Effect of gate voltage on carrier motion
03:34
7.2 The effective vertical electric field
06:15
7.3 Calculating effective mobility
04:52
7.4 Carrier velocity saturation model
06:08
7.5 Carrier velocity saturation versus pinchoff
03:32
8.1 Carrier velocity saturation in long channel MOSFET
03:54
8.2 Characteristics with size reduction
04:34
8.3 MOSFET current with gate voltage
02:28
8.4 MOSFET current dependence on channel length
02:40
8.5 MOSFET current dependence on gate oxide thickness
02:42
8.6 The physical effect of channel length
02:17
8.7 I-V calculation example
03:42
8.8 Pinch-off model versus velocity saturation example
03:51
9.1 The Moore’s law
02:33
9.2 The scaling rule
03:50
9.3 The international technology roadmap for semiconductor (ITRS)
04:44
9.4 The economy of scaling
04:08
9.5 The scaling limit
03:37
9.6 Effects of scaling on parasitics
04:16
9.7 Example in technology selection
02:41
10.1 Short channel MOSFET design
05:52
10.2 Threshold voltage scaling
05:20
10.3 Source、drain charge sharing
04:39
10.4 Drain induced barrier lowering (DIBL)
03:50
10.5 Punchthrough
03:18
11.1 Modern MOSFET structure
05:25
11.2 High-k gate dielectric
06:12
11.3 Metal gate technology
05:26
11.4 Source、drain and channel engineering
04:07
11.5 Strain engineering
04:36
11.6 On、off current tradeoffs
03:25
12.1 Silicon-on-insulator MOSFETs
05:47
12.2 Double-gate MOSFETs and FinFETs
04:24
12.3 Multi-gate MOSFETs
04:37
12.4 Tunneling MOSFETs
06:31
12.5 Junctionless transistors
04:47
12.6 2-D transistors and carbon nanotube FETs
05:50
12.7 Farewell
00:41
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